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B.E. in Electronics and Communication from North Gujarat University (2006), MS in General Engineering from San Jose State University (2010), Design Engineer for R & D at Amtech Electronics (2007), Lab Monitor at Department of Mathematics since 2009.
Headline:
Startup Member
Work status:
Full-Time Student
Industries:
Computing, Information Technology, Internet, Nanotech
Skills:
C/C++, Design, Editing, Electrical Engineering, Engineering, English, Human-Computer Interaction, Languages, Languages and Platforms, Leadership, Management, Software Engineering
Career advice, Employment opportunities, Finding cofounders, Finding team mates, Growing my group, Internships, Joining a startup, Meeting new people, Professional opportunities, Recruiting for my startup
Schools:
California State University System - San Jose State University
WORK EXPERIENCE
Employer:
Department of Mathematics SJSU
Position:
Lab Monitor
Time period:
January 2009 - Present
Description:
Helping students for problems with software for calculus. Regular maintenance of computer systems at Mathematics department (formatting/ Installation / backup).
Employer:
Amtech Electronics (India) Limited
Position:
Design Engineer (R & D)
Time period:
June 2006 - July 2007
Description:
Major responsibilities included designing of hardware for the application using processors, Algorithm development, Software development using ‘C’ or ‘assembly’, PCB designing, Implementation of hardware and software, testing of designs.
Employer:
Amtech Electronics (India) Ltd
Position:
Intern \ Design Engineer
Time period:
June 2006 - July 2007
Description:
Joined as an intern, and continued to work full time as a Design Engineer for R & D department after completion of my internship. Major responsibilities included designing of hardware for the application using processors, Algorithm development, Software development using ‘C’ or ‘assembly’, PCB designing, Implementation of hardware and software, testing of designs.
EDUCATION
University:
California State University System - San Jose State University
Time period:
2010
Degree:
Electronic Materials and Devices (EMD) and VLSI, MSc
To develop a methodology to replace the high cost FPGA chip by low cost microcontroller in order to support low speed applications by converting verilog HDL code to assembly code and redesigning the basic architecture of microcontroller.
