Matt Carbonara
MS and BS degrees in Electrical Engineering from The Ohio State University. 5+ years of venture capital investment experience, 3 years of Silicon Valley product marketing and 6 years of Silicon Valley engineering experience, now at TeleSoft Partners.
| Headline: | Investor |
| Skills: | Electrical Engineering, Engineering |
| Groups: | BASES |
| Interested in: | Advising startups, Investing in projects, Meeting new people, Mentoring, Offering Expertise, Professional opportunities, Supporting my investments |
| Schools: | Ohio State University System - Columbus |
WORK EXPERIENCE
| Employer: | TeleSoft Partners |
| Position: | Firm Consultant, Venture Capital; Managing Director, Venture Capital; Vice President, Venture Cap; Senior Associate, Venture Capital |
| Time period: | January 2001 - Present |
| Description: | Transaction experience includes lead equity investments and follow-on equity investments. Areas of specialization cover a broad range of technologies including: semiconductors, computer / storage systems, data communications equipment, telecommunications equipment and infrastructure software.
• Sourced opportunities via conferences, venture professionals, attorneys and entrepreneurs. • Performed due diligence culminating in an investment thesis: • Competitive analysis, Market size analysis, Ecosystem analysis, Customer references, Management references, Industry analyst references, Financial plan analysis, Comparable financing analysis, Potential exit value, Modeled pre and post-financing capitalization tables, Evaluated ownership and return scenarios under various investment terms. • Portfolio companies include: LiteScape Technologies, Validity Sensors, Jungo Software (Acquired by NDS: NNDS), Matrix Semiconductor (Acquired by Sandisk: SNDK), Ikanos (IPO: IKAN), SigmaTel (IPO: SGTL), TollBridge (Shutdown). • Assisted portfolio companies with recruiting (External BoD members and Executives), strategy, customer/partner introductions and financing scenarios/presentations. • Track portfolio company performance and key actions items and report to partnership and limited partners. • Held working sessions with corporate partners to facilitate business development for portfolio companies. • Created and maintained investment themes based on industry and technology trends. • Researched potential areas of investment and presented “knowledge sessions” to partnership. • Actively networked with other venture capital professionals to build a network of 200+ contacts. • Evaluated and recommended contact management system for firm wide deployment. |
| Employer: | Terayon Communication Systems |
| Position: | Product Marketing Manager; Senior Member Technical Staff |
| Time period: | January 1995 - December 2001 |
| Description: | - Product Marketing Manager
Joined start-up as early employee and contributed through and past IPO in 1998. • Co-founded and grew the product-marketing department. • Interviewed, hired and managed product-marketing team members that reported to my position. • Market research, product definition and product management for network management product. • Created and championed partner program - analyzing, contacting and creating partnerships with OSS firms to round out Terayon’s solution offering. • Created sales presentations and marketing materials. • Wrote white papers and applications notes. - Senior Member Technical Staff Architecture, design, test and lab bring up for multiple communication systems ASICs. • Architect, design and test various ASICs for Terayon’s cable modem and CMTS products. • Bring up and debug multiple ASICs in the lab for system integration purposes. |
| Employer: | LSI Logic. |
| Position: | Design Engineer, CoreWare and Logic Block Synthesis Group |
| Time period: | January 1993 - December 1995 |
| Description: | Responsible for custom high performance logic blocks and tools to optimize the value of LSI Logics cell libraries to designers.
- Architect, design, develop, implement and verify custom data path blocks from logic to layout. - Managed outsourcing of technology conversion on the logic block synthesis application. - Awarded US Patent No 5,898,595, “AUTOMATED GENERATION OF MEGACELLS IN AN INTEGRATED CIRCUIT DESIGN SYSTEM,” Carbonara, et. al. |
| Employer: | Amdahl Corporation |
| Position: | System Design Engineer |
| Time period: | January 1992 - December 1993 |
| Description: | Modeled CPU Performance and implemented CPU functionality.
• Develop a cycle accurate CPU model, using C, for performance evaluation. • Produce the logical and physical design of chips that comprise part of the CPU. |
EDUCATION
| University: | Ohio State University System - Columbus |
| Time period: | 1990 - 1992 |
| Degree: | Electrical Engineering, MSc |
| University: | Ohio State University System - Columbus |
| Time period: | 1985 - 1990 |
| Degree: | Electrical Engineering, BSc |
INFORMATION
| Hobbies: | Interests include: reading, technology, basketball, golf. |
