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Anirudh Dhurka

Headline: Engineer
Work status: Full-Time Student
Website: http://www.stanford.edu/~adhurka
Industries: Cleantech, Nanotech
Skills: C/C++, Design, Electrical Engineering, Engineering, Java, Perl
Location: Stanford, CA
Groups: E-Challenge Competition 2008, E-Challenge Competition 2009, [INACTIVE] BASES E-Challenge 2010
Interested in: Consulting opportunities, Employment opportunities, Finding team mates, Internships, Meeting new people, Professional opportunities, Recruiting for my startup, Starting a company
Schools: Institute of Technology, Banaras Hindu University, Stanford University

FEATURED STARTUP

PiezoCharge

PiezoCharge PiezoCharge

Mobile Charge - on the go

  • Startup type: Competition Entry
  • Status: Active
  • Stage: Just An Idea

WORK EXPERIENCE

Employer: Department of Radiology, Stanford University
Position: Research Assistant
Time period: November 2007 - Present
Description: • Aiming to enhance the quality of the ultrasound image by appropriate frequency filtering in
MATLAB; so as to be able to see and detect a tumor in the tissue clearly.

Employer: Department of Electrical Engineering, Stanford University
Position: EE214 Design Project
Time period: November 2007 - December 2007
Description: Conceived and designed a fully differential Operational Transconductance Amplifier for switched
capacitor applications with 90dB Dynamic Range, 40ns Maximum Settling time, 0.025% Maximum
Static and Dynamic Errors and minimum possible power dissipation.

Employer: Department of Electrical Engineering, Stanford University
Position: EE271 Design Project
Time period: November 2007 - December 2007
Description: • Correctly verified the Queue Management module of an IP Router and fixed the design bugs.
• Successfully design of the LPM module of an IP Router using the linear search algorithm.

Employer: NVIDIA Corporation
Position: ASIC Design Engineer
Time period: July 2005 - July 2007
Description: • Design verification engineer of the NVIDIA legacy SATA controller in nForrce 5700 - the chipset for
AMD Servers.
• Facilitated the FPGA debug of the nForce 5700 on an emulation system and also assisted the QA
activities at NVIDIA’s headquarters in Santa Clara, CA.
• Conducted HT over-clocking experiments and achieved 150% over-clocking ability.
• Validated the chipset’s Audio Controller Unit on the first Silicon samples and worked as a part of a
10 member Silicon bring-up team at the Santa Clara office.
• Designed and implemented a Verilog test-bench to catch potential deadlock scenarios in the chipsetintegrated
graphics core which should be in the production soon. The development of the test-bench
required a clear understanding of the common interfaces in a processor based system viz. Hyper
Transport, PCIe, Memory Interface and how the GPU interacts with them.

Employer: Institute of Technology, Banaras Hindu University
Position: B. Tech Project
Time period: December 2004 - April 2005
Description: • Conceptualized and designed filters for various Audio effects in MATLAB. Assessed the filter design
by a real-time Audio Processing with implementation of Bass, Treble, Reverberation and Chorus
Filters on Texas Instruments TMS320C6711 Floating Point DSP Kit.

Employer: Space Applications Centre, Indian Space Research Organization
Position: Summer Intern
Time period: May 2004 - June 2004
Description: • Developed a secure and robust cryptographic algorithm based on Pseudo Random Binary Sequences
and implemented it on a SoC (Cradle Technologies Inc.) with real time bit I/O.

Employer: Institute of Technology, Banaras Hindu University
Position: Microprocessor Lab Project
Time period: January 2004 - April 2004
Description: • Interfacing of Display Segments, Motors, Elevator Models and Keyboard with an Intel 8086 kit.
• Programming the system using 8086 Assembly Language.

EDUCATION

University: Stanford University
Time period: 2007 - 2009
Degree: Electrical Engineering (MS)

University: Institute of Technology, Banaras Hindu University
Time period: 2001 - 2005
Degree: Electronics Engineering, BEng

Anirudh Dhurka

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